Bring up Voyager SDK in Orange Pi 5 Plus

This guide covers installing Ubuntu 22.04 and the Voyager SDK on an Orange Pi 5 Plus (RK3588 Arm) board, then modifying the device tree so the Metis M.2 card enumerates correctly.

Install Ubuntu 22.04​

Use the official Orange Pi 5 Plus images from the Orange Pi service and support page to install Ubuntu 22.04.

This guide was tested using Balena Etcher to flash the following image to an SD card:

Orangepi5plus_1.2.0_ubuntu_jammy_desktop_xfce_linux5.10.160.7z

For more detail, see the official Orange Pi resources:

• Orange Pi service and support
• Orange Pi 5 Plus wiki

Install the Linux headers​

Follow the Orange Pi 5 Plus wiki, then install the Linux headers:

sudo dpkg -i /opt/linux-headers-legacy-rockchip-rk3588_1.2.0_arm64.deb

Edit the config file before installing the Voyager SDK​

1. Open cfg/config-ubuntu-2204-arm64.yaml.

2. Comment out every line containing:

   libmali-valhall-g610-g13p0-x11-gbm
   

3. Save the file.

Install the Voyager SDK​

Clone the Voyager SDK repository and install as usual:

./install.sh --YES --media --user <email> --token <token>

Why the device tree needs changing​

The driver probe initially fails because the PCIe Root Complex (RC) port behind Metis does not have enough space for the Metis device's non-prefetchable memory.

You can diagnose this by looking in sudo dmesg for this message:

axl xxxx:xx:xx.x: Failed to request resources
axl: probe of xxxx:xx:xx.x failed with error -12

You may also see [disabled] messages in lspci for the RC behind Metis:

lspci -s 0000:00:00.0 -vv
 0000:00:00.0 PCI bridge: Rockchip Electronics Co., Ltd RK3588 (rev 01) (prog-if 00 [Normal decode])
         Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B- DisINTx+
         Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
         Latency: 0
         Interrupt: pin A routed to IRQ 253
         Bus: primary=00, secondary=01, subordinate=ff, sec-latency=0
        I/O behind bridge: [disabled]
        Memory behind bridge: [disabled]
        Prefetchable memory behind bridge: [disabled]

The default SOC device tree assigns less than 33 MB for non-prefetchable memory windows per PCIe root complex. You need to increase this size in a custom device tree, or insert a PCIe overlay.

Update the device tree​

Find the fe port where the RC behind Metis is located. In this case the RC is 0000:00:00.0 and the fe port is fe150000. Check with:

orangepi@orangepi5plus:~$ ls -l /sys/bus/pci/devices/
total 0
lrwxrwxrwx 1 root root 0 May 29 19:54 0000:00:00.0 -> ../../../devices/platform/fe150000.pcie/pci0000:00/0000:00:00.0
lrwxrwxrwx 1 root root 0 May 29 19:54 0000:01:00.0 -> ../../../devices/platform/fe150000.pcie/pci0000:00/0000:00:00.0/0000:01:00.0
lrwxrwxrwx 1 root root 0 May 29 19:54 0002:20:00.0 -> ../../../devices/platform/fe170000.pcie/pci0002:20/0002:20:00.0
lrwxrwxrwx 1 root root 0 May 29 19:54 0002:21:00.0 -> ../../../devices/platform/fe170000.pcie/pci0002:20/0002:20:00.0/0002:21:00.0
lrwxrwxrwx 1 root root 0 May 29 19:54 0003:30:00.0 -> ../../../devices/platform/fe180000.pcie/pci0003:30/0003:30:00.0
lrwxrwxrwx 1 root root 0 May 29 19:54 0003:31:00.0 -> ../../../devices/platform/fe180000.pcie/pci0003:30/0003:30:00.0/0003:31:00.0
lrwxrwxrwx 1 root root 0 May 29 19:54 0004:40:00.0 -> ../../../devices/platform/fe190000.pcie/pci0004:40/0004:40:00.0
lrwxrwxrwx 1 root root 0 May 29 19:54 0004:41:00.0 -> ../../../devices/platform/fe190000.pcie/pci0004:40/0004:40:00.0/0004:41:00.0

1. Install the device-tree compiler and list the Orange Pi device trees:

   sudo apt update
   sudo apt install device-tree-compiler
   ls /boot/dtb/rockchip/ | grep orangepi
   

   Output:

   rk3399-orangepi-4-lts.dtb
   rk3566-orangepi-3b.dtb
   rk3566-orangepi-3b-v2.dtb
   rk3566-orangepi-cm4.dtb
   rk3566-orangepi-cm4-v1.4.dtb
   rk3588-orangepi-5-max.dtb
   rk3588-orangepi-5-plus.dtb
   rk3588-orangepi-5-ultra.dtb
   rk3588-orangepi-ai-max.dtb
   rk3588s-orangepi-5b.dtb
   rk3588s-orangepi-5.dtb
   rk3588s-orangepi-5-pro.dtb
   rk3588s-orangepi-cm5.dtb
   rk3588s-orangepi-cm5-tablet.dtb
   

2. Decompile the device tree:

   dtc -I dtb -O dts -o rk3588-orangepi-5-plus.dts /boot/dtb/rockchip/rk3588-orangepi-5-plus.dtb
   

3. Modify the ranges in the RC behind Metis in rk3588-orangepi-5-plus.dts:

   	pcie@fe150000 {
   ...
                ranges = <0x800 0x00 0xf0000000 0x00 0xf0000000 0x00 0x100000
                        0x81000000 0x00 0xf0100000 0x00 0xf0100000 0x00 0x100000
                        0x82000000 0x00 0x40000000 0x09 0x00 0x00 0x20000000
                        0xc3000000 0x00 0x60000000 0x09 0x20000000 0x00 0x20000000>;
   

4. Recompile the device tree:

   dtc -I dts -O dtb -o rk3588-orangepi-5-plus.dtb rk3588-orangepi-5-plus.dts
   

5. Back up the original .dtb, then move the new one to /boot/dtb/rockchip/rk3588-orangepi-5-plus.dtb.

6. Reboot.

After rebooting, lspci -s 0000:00:00.0 -v should show valid memory, and lspci -s 0000:01:00.0 -v should show resources allocated and enabled. You can now run inference on Metis with your Orange Pi 5 Plus.

AXELERA_CONFIGURE_BOARD=,30 ./inference.py yolov8l-coco-onnx ./media/traffic1_480p.mp4 --no-display